We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 16647

7.1i XST - "WARNING:NgdBuild:457 - logical net 'myin_ibuf' has an active driver and a pullup"


Keywords: instantiate, VHDL, Verilog, pull-up

Urgency: Standard

General Description:
When pull-ups are instantiated into sub blocks and the hierarchy of my entire design is preserved, XST does not recognize the pull-ups at the global I/O bufferization process. This results in XST placing IBUFs before the pull-ups and the following warning occurs:

"WARNING:NgdBuild:457 - logical net 'net_name' has an active driver and a pullup."

As a result, the final implementation does not have the desired pull-up in the I/O pad.


You can work around this issue by making these pull-ups visible in the top level using one of the following methods:
- Manually move pull-ups to the top level.
- Put keep_hierarchy=no on the block where the pull-ups are instantiated or set the keep_hierarchy=no.

NOTE: The keep_hierarchy global setting is an advanced option. To enable advanced options, refer to (Xilinx Solution 11088). By default, the keep_hierarchy is set to "no". To change the keep_hierarchy setting, follow these steps:
1. Right-click the "Synthesize" process.
2. Select "Properties..."
3. Select the "Synthesis Options" tab.
4. Deselect the Keep Hierarchy setting.
AR# 16647
日期 01/06/2009
状态 Archive
Type 综合文章