AR# 16713


5.1i XST - Incorrect logic occurs for Verilog shift left arithmetic <<< with a signed operand


Keywords: XST, Verilog, 2001, shift, left, arithmetic, sign, signed

Urgency: Standard

General Description:
datain <<< 3'sb101
XST is treating the right operand as -3 instead of +5. As a result, it is shifting right by 3.


The Verilog 2001 specification states that the right operand of shift operators is always treated as an unsigned number.

This problem is fixed in the latest 5.2i Service Pack, available at:
The first service pack containing the fix is 5.2i Service Pack 1.
AR# 16713
日期 10/20/2005
状态 Archive
Type 综合文章
People Also Viewed