UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 16935

3.1 System Generator for DSP and 5.2i XST and 5.2i MAP - "ERROR:MapLib:32" reported when using XST to synthesize a System Generator design that contains a DDS core

描述

Keywords: COREGen, known, issues, 5.2i, MAP, XST, DDS, SysGen, MapLib

The following error is reported when I use XST to synthesize a System Generator design that contains a DDS core:

"ERROR:MapLib:32 - LUT4 symbol "dds_core_instance/BU3"

解决方案

This is a known issue that was fixed in the System Generator for DSP 6.1 release.
AR# 16935
日期 04/05/2006
状态 Archive
Type 综合文章
的页面