UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 1706

5.1i CPLD ABEL - How do I place test vectors (a TMV file) into a CPLD JEDEC file?

Description

Keywords: 4.2i, 4.1i, 3.1i, 2.1i, XABEL, ABEL, JED, Foundation

When I use Foundation or Alliance tool sets to fit an ABEL design, the version control directory structure imposed by the Xilinx Design Manager does not allow automatic insertion of test vector files into a JEDEC file.

How can test vectors from a top-level ABEL file be included within a XPLA3 or XC9500/XL/XV JEDEC file?

解决方案

The F2.1i and later software versions support the ability to write test vectors into JEDEC files.

The ABEL compiler creates a <design>.tmv file that contains test vector information from the ABEL code whenever it compiles a design containing user test vectors.

The CPLD fitter transfers this test vector information into the JEDEC file whenever it finds a .tmv file with the same name as the design in the design directory.

Foundation ISE

The test vectors in the ABEL file will automatically be added into the JED file. No user intervention is necessary.


Foundation Classic/Aldec

The Xilinx Design Manager creates a subdirectory (typically named xproj\ver1\rev1) and runs the fitter there.

The fitter will not find the .tmv file because it is looking in the subdirectory instead of the root design directory where ABEL created it. The .tmv file must be copied into the rev1 directory for test vectors to be included in the JEDEC file.

To include test vectors in a JEDEC file, follow these steps:

1. If you are using Foundation, make sure the name of your top-level ABEL source file and the name in the MODULE statement within that source file both match the name of your Foundation project (this step is specifically required for the test vector solution to work.)
2. Compile the top-level ABEL design file as usual. The ABEL compiler creates <project_name>.tmv containing your test vector info. It also creates <project_name>.xnf or <project_name>.edn.
3. Invoke the Xilinx Design Manager. Perform Design -> Translate. The Design Manager creates either:
xproject\v1_0\rev1 directory containing the <project_name>.xff file.
or
xproj\ver1\rev1 directory containing the <project_name>.ngd file.

The Design Manager creates different directory names as you iterate your design.
4. In File Manager or Explorer, copy the <project_name>.tmv file from the root project directory into the rev1 subdirectory (or the most recently created rev subdirectory).
5. In the Xilinx Design Manager, invoke the Flow Engine and run the design as usual. The Design Manager creates the <project_name>.jed programming file in the root project directory (it automatically copies it up from the "rev" directory). The JEDEC file will contain the test vectors derived from the source file.

NOTE: This procedure assumes your design is completely ABEL-based.
AR# 1706
创建日期 08/21/2007
Last Updated 07/28/2009
状态 Archive
Type 综合文章