We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 17088

11.1 EDK - What are the PowerPC registers defined in the SmartModel?


Keywords: SmartModel, Windows, PPC

The PowerPC SmartModel contains "windows" that allow you to view certain registers inside the SmartModel. Several of these registers are not described in the PowerPC Processor Reference Guide. What are these additional registers?


Following is a brief definition for each register:

dcdAddr = Address of instruction at decode stage
dcdData = Instruction at decode stage
exeFull = There is a valid instruction in the exe stage
exeAddr = Instruction address in the exe stage
exeAReg = Operand A
exeBReg = Operand B
exeResult = Result of the operation

AR# 17088
日期 04/24/2009
状态 Active
Type 综合文章