UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 17714

3.2 EDK - How do I specify my JTAG chain when generating the System ACE file for my PowerPC system?

描述

Keywords: chain, configuration, configure, bitstream

Urgency: Standard

General Description:
How do I specify my JTAG chain when generating the System ACE file for my PowerPC system (for any board)?

解决方案

The System ACE file is generated by executing an "xmd" script ("genace.tcl") available in the EDK installation path:

$/EDK/data/genace.tcl

This script generates a System ACE configuration file from FPGA bitstream and PowerPC ELF program.

At the bottom of this file, there is a detailed description of the "genace.tcl" script that will allow you to customize the JTAG Chain using "jtag_v2p_position" and "jtag_devices."
AR# 17714
日期 04/28/2006
状态 Archive
Type 综合文章
的页面