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AR# 17873

6.2/6.1 EDK, SimGen - When I run a behavioral simulation of my processor system with my test bench, the processor does not run any instructions


Keywords: Xilinx Platform Studio, XPS, simulation, behavioral simulation, ModelSim, MicroBlaze, PPC, Power PC, PowerPC

Urgency: Standard

General Description:
I am trying to behaviorally simulate my processor system with a testbench, but it doesn't appear that the system is running any instructions. What could be wrong?


If you are simulating a processor system that is not the top level of the design, please see (Xilinx Answer 16166) for instructions on that simulation.

When simulating a top-level processor system with a test bench, you must include a configuration statement that effectively loads the initialization vectors into the instruction side Block RAM. A modified version of this configuration statement should be placed at the end of the test bench.

configuration testbench_conf of testbench is -- configuration <configuration name> of <testbench entity name>
for behavior -- Testbench architecture
for proc_sys : system -- Processor system instance name : entity name
for IMP -- Processor System Architecture
for all : bram1_wrapper use configuration work.bram1_conf; -- change "bram1" to the name of the BRAM needing initialization
end for;
end for;
end for;
end for;
end testbench_conf;
AR# 17873
日期 03/05/2006
状态 Archive
Type 综合文章