AR# 1816


CPLD XC9500 Family - How do I determine low-power mode timing (tLP, tLOGILP)?


General Description:

How to I determine the path timing of an XC9500 macrocell in low power mode?


When determining path timing in low power mode, use tLOGILP in place of tLOGI.

For example, the following path in low power mode would be calculated as:

tPD = tIN + tLOGILP + tPDI + tOUT

9500 Timing Model
9500 Timing Model

The Xilinx Application Note "Using the XC9500XL Timing Model" (Xilinx XAPP111) discusses timing calculations in detail.

AR# 1816
日期 12/15/2012
状态 Archive
Type 综合文章
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