# AR# 19146

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## 描述

Are Spartan-3/-3E I/Os 5V-tolerant? Can I drive Spartan-3/-3E I/Os with a voltage higher than the VIH of the I/O standard?

## 解决方案

Spartan-3/-3E I/Os have a pair of clamp diodes that connect to VCCO (VCCAUX for dedicated pins) and GND, as shown in the data sheet at:

Spartan-3:

http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf

Spartan-3E:

http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf

Select Spartan-3/-3E Functional Description (Module 2). The IOB Overview section has an illustration of the clamp diodes in the IOB (ESD protection diodes).

When the input voltage is greater than VCCO +0.5V, the upper clamp diode turns on and conducts a reverse current into the associated supply (VCCO for nondedicated I/O; VCCAUX for dedicated I/O). Because this reverse current can damage the I/O, the Spartan-3/-3E I/O is not 5V-tolerant.

Spartan-3/-3E I/O can be made 5V-tolerant by using an external series current-limiting resistor to limit the current into the upper clamp diode to 10 mA. This makes the input 5V-tolerant, but an I/O configured as an output still cannot drive 5 Volts and the resulting VOH does not meet the input specifications of the 5V device.

The following is an example of how to calculate the value of the external current-limiting resistor (Rser), given the following information:

- The forward-bias voltage of the clamp diode is 0.5 V (Vd). However, the largest voltage drop across the clamp diode is determined by:

Vd = Vinx - Vccomax

where Vinx = 4.05V and is the maximum voltage to avoid oxide stress

- The limit that any I/O pin can be overdriven above or below the limits of GND and VCCO is 10 mA.

- The maximum input voltage on the input pad can be VCCO +0.5V. Vinmax - Absolute Max rating found in the Spartan-3/-3E FPGA Family: DC and Switching Characteristics data sheet at:

For Spartan-3:

http://www.support.xilinx.com/xlnx/xweb/xil_publications_display.jsp?sGlobalNavPick=&sSecondaryNavPick=&category=-1209725&iLanguageID=1

For Spartan-3E:

http://www.support.xilinx.com/xlnx/xweb/xil_publications_display.jsp?sGlobalNavPick=&sSecondaryNavPick=&category=-1211389&iLanguageID=1

Assuming that you want to drive 5V from device "X" to the LVCMOS33 input in Spartan-3/-3E, the following are applicable:

- The VCCO min/max for the LVCMOS33 is 3.0/3.45V.

- The output voltage of the 5V device (Vsrc) is 5V +/-10%.

- The maximum voltage drop across the diode that is allowed to prevent oxide stress is Vd = 4.05V - 3.45V = 0.6V.

- Id (current through the diode when Vd = 0.6V) is 5.51mA. This value can be found in the IBIS model. The value is taken at maximum power rating I(max).

[POWER_clamp]

voltage...I(typ)..........I(min)............I(max)

-1.50.....1.46A...........1.59A...........1.41A

-1.40.....1.21A...........1.33A...........1.16A

-1.30.....0.96A...........1.08A...........0.91A

-1.20.....0.71A...........0.84A...........0.66A

-1.10.....0.47A...........0.60A...........0.42A

-1.00.....0.25A...........0.38A...........0.21A

-0.90.....78.20mA.....0.18A...........53.88mA

-0.80.....14.96mA.....44.93mA.....18.61mA

-0.70.....6.69mA.......8.78mA........10.98mA

-0.60.....2.80mA........2.96mA.......5.51mA

-0.50.....0.68mA........0.83mA.......1.82mA

-0.40.....81.60uA.......0.14mA.......0.29mA

-0.30.....5.30uA.........14.10uA......20.82uA

-0.20.....0.24uA.........1.09uA........0.86uA

-0.10.....13.24nA.......91.41nA......72.27nA

0.00.....5.70nA..........29.91nA......46.43nA

The maximum voltage difference between the 5V source and the FPGA pad is Vsrc - (Vccomax + Vd) = 5.5 - (3.45 + 0.6) = 1.45V.

To limit the current to 5.51mA (and maintain a 0.6V drop across the diode), you must have a series resistor (Rser) of 1.45/5.51mA = 263 ohm (Or 300 ohm with standard 5% resistor).

NOTES:

1. Follow the simultaneous switching output (SSO) guideline. Refer to the "Spartan-3 FPGA DC and Switching Characteristics" Data Sheet at:

http://www.support.xilinx.com/xlnx/xweb/xil_publications_display.jsp?sGlobalNavPick=&sSecondaryNavPick=&category=-1209725&iLanguageID=1

Select Spartan-3 DC and Switching Characteristics (Mode 3) -> Simultaneous Switching Output (SSO) Guidelines. This section lists the maximum number of simultaneously switching outputs per Power/Ground pin pair.

2. The minimum VCCO is for worst-case calculation.

3. Maintain a stable, clean, and properly bypassed VCCO at all times.

4. Place the resistor closer to the driver for better signal integrity.

5. Perform IBIS simulation to verify the result.

6. The clamp diodes are always present (programmed, unprogrammed, during configuration), and there is never a need to add external clamp diodes in the event that the Spartan-3 is unprogrammed and has 5V signals driving the pins. For more information on driving an unpowered I/O (hot-swapping), refer to (Xilinx Answer 19777).

7. For a thorough look at high voltage switching in the Spartan-3 Generation, please see XAPP459:

http://www.xilinx.com/support/documentation/application_notes/xapp459.pdf

http://www.xilinx.com/support/documentation/application_notes/xapp453.pdf

9. Other references are the Spartan-3 Generation FPGA User Guide (UG331):

http://www.xilinx.com/support/documentation/user_guides/ug331.pdf

and the Spartan-3 Generation Configuration User Guide (UG332):

http://www.xilinx.com/support/documentation/user_guides/ug332.pdf
AR# 19146

Type 综合文章

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