We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 19184

6.2i XST - XST swaps bits of unconstrained arrays in VHDL (LSB<=>MSB)


Keywords: XST, VHDL, MSB, LSB, swap, unconstrained, vector, array, range, downto, to

Urgency: Standard

General Description:
In some cases, XST swaps bits in unconstrained arrays when assignments are made. In VHDL, it is legal to leave an array unconstrained if the array can obtain its bounds from the signal that is sourcing it. An unconstrained array is a signal that does not have an upper or lower bound, as in the following example:

signal register_out : std_logic_vector ; -- there is no range, for example (15 downto 0)


If possible, constrain the arrays in your design to verify if they are the point of failure.

This problem has been fixed in the latest 6.2i Service Pack available at:
The first service pack containing the fix is 6.2i Service Pack 2.
AR# 19184
日期 07/18/2007
状态 Archive
Type 综合文章