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AR# 1963

5.x PPR - Design not routing (unroutes) because placement is to tightly packed.



Urgency: standard

General Description:
PPR will do an optimized placement on a design by placing
different design components very close together to minimize
routing delays. Though sometimes it places everything
to close together, resulting in a lack of routing resources in
certain areas, which causes PPR to end with unroutes.



The best resolution to this problem is to floorplan certain
critical components in the design laying the structure for the
rest of the automatic placement to follow.


There is an undocumented option in PPR which will may also
help to spread things out.
The option goes in the xactinit.dat file, the syntax is:

This option has not been fully tested, and although it may help
the design to route, it will usually effect timing.


Putting a prohibit placement constraint on a few CLBs in the
high density areas of the device may help the placer spread things out a little more.
The constraint file syntax for PPR (XC4000, XC5200 series only) prohibiting placement in a CLB is:
notplace instance *: clb_r1c5;
This constraint would not allow anything to be placed in the
CLB at row 1, column 5.
AR# 1963
创建日期 08/31/2007
Last Updated 03/22/2000
状态 Archive
Type ??????