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AR# 19652

XtremeDSP Development Kit-II - My design does not reset when I use the ONBOARD RESET Signal F24

描述

General Description: 

My design does not reset when I use the ONBOARD RESET Signal F24. Why?

解决方案

The problem is that the documentation for the XtremeDSP Development Kit-II is wrong. 

 

All the way through Issue 4, the diagram in Figure 33 under Section 9.2.1 shows SYSTEM_RESET connecting to F24 on the USER FPGA and ONBOARD_Reset connecting to G16 on the USER FPGA. 

 

The corrected version should show: 

SYSTEM_RESET -> G16 on USER FPGA and L13 on CLOCK FPGA 

ONBOARD_RESET -> F24 on USER FPGA

AR# 19652
日期 05/16/2014
状态 Archive
Type 综合文章
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