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AR# 19881

LogiCORE XAUI v5.0 Core - Release Notes and Known Issues for the XAUI Core

描述

General Description: 

This Answer Record contains the following information for the LogiCORE XAUI v5.0 Core, which is released in 6.3i IP Update 3 and IP Update 4: 

 

- What's New 

- Known Issues 

 

For the installation instructions and software requirements, please see (Xilinx Answer 19939) for 6.3i IP Update 3 and (Xilinx Answer 20083) for 6.3i IP Update 4. 

 

NOTE: The XAUI v5.0 Core is identical in both 6.3i IP Update 3 and IP Update 4 releases.

解决方案

What's New 

 

Enhancements 

- RocketIO Transceiver instances are taken out of the XAUI Core and must now be instantiated by the user to allow more flexibility (the HDL Example Design provided with the core provides an example RocketIO instantiation). 

 

- Added transmit and receive simplex modes in addition to the existing full duplex mode. 

 

- Added support for 10 Gigabit Fibre Channel, which includes a 2% higher clock speed. 

 

- Enhanced ModelSim scripts to make demo simulations clearer. 

 

- New documentation has been added, including Getting Started Guide and User Guide. 

 

Bug Fixes 

- Corrected an issue in which the MDIO interface of the XAUI block did not work properly because the core did not properly wait for the "turn-around" in the MDIO frame. 

 

Known Issues 

- RTL simulation of the "transceiver.v" file in the XAUI Core fails because defparams are of type "integer" instead of type "string". 

 

For more information regarding this issue and instructions on how to work around it, please see (Xilinx Answer 20034).

AR# 19881
日期 05/16/2014
状态 Archive
Type 综合文章
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