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AR# 20128

6.3i Timing/Virtex-II Pro/Virtex-4 - Timing delays associated with PowerPC 405D are incorrect values


Urgency: Hot

General Description:

When I run my PowerPC 405 design through timing, some of the timing parameters are too large for the input clock. This affects the clock skew between the PowerPC and the logic in the fabric and clock to output times for the PowerPC. When is this going to be fixed?


This problem has been fixed in the latest 6.3i Service Pack available at:

The first service pack containing the fix is 6.3i Service Pack 2.

AR# 20128
日期 01/18/2010
状态 Archive
Type 综合文章