UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 2056

CONCEPT2XIL/SIR2EDF - " Error! Cell name not specified"

Description

Keywords: cell name, specified, initializing

Urgency: Standard

General Description:
CONCEPT2XIL may issue the following error message:

<input>
"Initializing environment ... Error! Cell name not
specified"
</input>

Such errors from the SIR2EDF subprogram of CONCEPT2XIL are not
always meaningful.

解决方案

You may see this error if the design name you specified does
not correspond to any existing blocks in the project
directory, or there is no entry for it in the .WRK library
work file.

Make sure you specified the input design name correctly, and
check that the .WRK file contains a reference to the design in
it. This reference to the design block is usually written to
the .WRK file when you first create the logic drawing
(schematic) for the design and save it.

If for some reason this reference is missing (say if the
design.wrk is corrupted, or you moved the design to a
different location without also moving the .WRK file, you can
manually edit the current .WRK file and add a reference to the
design.

Example:

Say the name of your design is "foo", and the
.WRK file, "design.wrk", looks like this:

<input>
FILE_TYPE = LOGIC_DIR;
"UNNAMED" 'unnamed';
"MYREG" 'myreg';
"TEST1" 'test1';
END.
</input>

Add an entry for "foo":

<input>
FILE_TYPE = LOGIC_DIR;
"UNNAMED" 'unnamed';
"MYREG" 'myreg';
"TEST1" 'test1';
"FOO" 'foo';
END.
</input>
AR# 2056
创建日期 08/31/2007
Last Updated 02/11/2001
状态 Archive
Type ??????