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AR# 20777

6.3 System Generator for DSP - Why do I see a difference between the behavioral simulation latency and hardware/timing latency when targeting Virtex-4?

描述


General Description:

Why do I see a difference between the behavioral simulation latency and hardware/timing latency when targeting Virtex-4?

解决方案


This is a known problem. There will be one extra cycle of latency in the hardware.



You can work around this issue by using the DSP48 primitive as a multiplier. You can easily set the DSP48 OPMODE by selecting the DSP48 OPMODE option in the Constant Block.



This issue is fixed in System Generator for DSP 6.3sp3 and 7.1.
AR# 20777
日期 07/28/2010
状态 Archive
Type 综合文章
的页面