AR# 20953

Virtex-4 - Speed File Revision History

描述

This Answer Record contains the Revision History for Virtex-4 family speeds files.

解决方案

Speeds Files Revision History:

1.71 Release: Description and Explanation of Changes

  • Added Support for xq4vl40 device
1.70 Release: Description and Explanation of Changes

  • Changed from ADVANCED to PRODUCTION for Virtex-4Q Pro Devices

1.69 Release: Description and Explanation of Changes (11.1)

  • Updated values for DCM (PSCLK) for -11 and -12 speed grades

1.68 Release: Description and Explanation of Changes

  • Updated values for FX100
  • Updated values for IOBs

1.67 Release: Description and Explanation of Changes

  • Update to block RAM clock to out in NO_CHANGE mode
  • Changed speed grades -10, -11, -12 to PRODUCTION for 4vFX40
  • Changed speed grades -10, -11 to PRODUCTION for 4vFX140
  • Changed speed grade -12 to PRODUCTION for 4vFX100
  • Increases setup for IDELAY for speed grade -12 (4vFX100)

1.66 Release: Description and Explanation of Changes

  • Updated DCM component

1.65 Release: Description and Explanation of Changes

  • Changed FX20 and FX60 for -12 speed grade to PRODUCTION

1.64 Release: Description and Explanation of Changes

  • Overall slowdown of 2% for CLB delays
  • Updated IDELAY min values

1.63 Release: Description and Explanation of Changes

  • Made SLICEM delays specific to device

1.62 Release: Description and Explanation of Changes

  • Increase in delays for ShiftReg(Clk 2 Out) and Flip-Flops (Setup/hold Times)
  • Decrease in frequency for PPC405 components for each speed grade
  • Available upon request only

1.61 Release: Description and Explanation of Changes

  • Change speed grade to PRODUCTION for FX12, FX20, FX60, and FX100 for -10 and -11
  • Updated DCM max and min period delay parameters for FX/LX/SX
  • Shift Register delays are increasing in -12 devices

1.60 Release: Description and Explanation of Changes

  • SX and LX devices are now PRODUCTION for -MIN speed grade (except LX300)
  • Updates for DCM, IOI, EMAC, and PPC components
  • Added derating support for temperature and voltage, and absolute min values

1.58 Release: Description and Explanation of Changes

  • This is the required minimum speeds file for all Virtex-4 LX and SX production devices
  • All SX and LX devices are now PRODUCTION
  • No change to LX25, LX60, SX35 ES and production SCD devices
  • No timing changes
  • For all other Virtex-4 devices, the following are timing changes:
  • A decrease in the delay through the DCM (Tdmcko_CLK*) for STEPPING 1 devices
  • Overall or Total Clock Path delay with a DCM will increase for OFFSET constraints
  • Default DESKEW_ADJUST value changed for LX160 and FX140 from 17 to 20
  • Default DESKEW_ADJUST value changed for LX200 from 17 to 21
  • DS302 v1.11 reflects timing from this speeds file

1.57 Release: Description and Explanation of Changes

  • Added PRODUCTION timing for LX15, LX25, LX40, LX60, and SX35 devices (-10 and -11 speed grade)
  • Updated data sheet for this version of the speeds file
  • DS302 v1.10 reflects timing from this speeds file
  • Updated CLB, clocking, DCM, DSP, IOB, and PPC components to create stepping-based delays
  • Supports ES/SCD/Production timing based on CONFIG STEPPING setting
  • LX/SX will have only stepping 1
  • SCD/ES will have stepping 0

1.56 Release: Description and Explanation of Changes

  • Updated values for the CLB, DCM, DSP, EMAC, and IOB components

1.54 Release: Description and Explanation of Changes

  • Decreased negative hold values
  • Decreased the frequency for FX pin of DCMs
  • Updated models for GT11 and PPC
  • Package flight time delays support

1.53 Release: Description and Explanation of Changes

  • Provided new parameters for jitter and phase-checking
  • Updated I/O Standard support
  • Updated parameters for clocking

1.52 Release: Description and Explanation of Changes

  • Updated values in the IOB components for differential I/Os
  • Added an additional speed grade (-12)
  • Updated clocking parameters
  • Updated parameters for DCM, DSP, block RAM, and FIFO components
  • Updated IDELAY default values to produce a zero hold time in legacy mode
  • Updated parameters for DCI on IOB components
  • Changed the -10 and -11 speed grades to ADVANCED

1.49 Release: Description and Explanation of Changes

  • Updated IOB and SERDES components

1.47 Release: Description and Explanation of Changes

  • Corrected values for the clocking component
  • Updated parameters for DSP, SERDES, block RAM, FIFO, and IOB components

1.46 Release: Description and Explanation of Changes

  • Updated parameters for CLB, GT11, and SERDES

For information on current speeds files versions for design tool releases, see (Xilinx Answer 12201).

AR# 20953
日期 03/22/2017
状态 Active
Type 综合文章