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AR# 21294

7.1i Timing Analyzer/trce Virtex4 - Timing analysis on Latch D -> Q as transparent latch delay when lat_d_q is disabled


General Description:

When I am doing timing analysis on my design, which has latches, the D->Q path is analyzed as a transparent latch delay, but the lat_d_q path tracing control is disabled. This path should be analyzed as combinatorial delay and not as a synchronous element. When is this going to be fixed?


This problem has been fixed in the latest 7.1i Service Pack available at:

The first service pack containing the fix is 7.1i Service Pack 2.

AR# 21294
日期 01/18/2010
状态 Archive
Type 综合文章