UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 21633

7.1i ISE Simulator (ISIM) - Typing a Step command prior to a Run command runs only up to 0 ns and indicates "initialization done"

描述

Keywords: ISE Simulator, ISIM, generated, VHDL, Verilog, schematic, Step, Run, Initialization

Urgency: Standard

General Description:
When I use the "Step" command and then use "Run", it runs only up to 0 ns and indicates "initialization done".

解决方案

This is a problem with ISE Simulator, where it is still trying to initialize the simulation when the Run command is issued.

To work around this issue, type "run <time>" again in the console and the simulation will run to the specified time.

This issue is fixed in ISE 9.1i.
AR# 21633
日期 10/16/2008
状态 Archive
Type 综合文章
的页面