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AR# 21698

7.1i EDK SP2 - OPB_PCI core has errors in the MPD

描述

General Description: 

OPB_PCI core has errors in the MPD. 

 

C_IPIF2PCI_FIFO_ABUS_WIDTH and C_PCI2IPIF_FIFO_ABUS_WIDTH of opb_pci has the following define, RANGE = (4:14). This is not correct. It should be some conditional range according to the core data sheet, 0 for NO FIFO, (4-12) for Virtex and (4-14) for Virtex-II. 

 

This error prevents running PlatGen when either one is set to 0, which is a valid value. 

 

The work around is to change the MPD file for this define to RANGE = (0:14).

解决方案

This problem has been fixed in the latest 7.1i EDK Service Pack available at: 

http://support.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 7.1i EDK Service Pack 2.

AR# 21698
日期 05/19/2014
状态 Archive
Type 综合文章
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