描述

Urgency: Standard  

General Description: 

A 32-channel (or more) polled SPI-3 PHY Core fails timing in PAR.

解决方案

If the system timing budget cannot permit this input setup to be relaxed, a solution is for the Link device to poll the PHY Core by holding TADR to the same value for 2 cycles, and then only sample the value on PTPA 2 cycles later (the result that comes 1 cycle later should be discarded). 

Other solutions are being investigated.