UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 22059

7.1i EDK SP2 - opb_spi v1.00.c fails, causing the OPB Bus to time out when accessing the internal registers

描述

General Description: 

My project writes to 0x70 (and other registers) and generates an ip2bus_wrack, but no spi_xferack. This results in an opb_timeout. When I switch to v1.00.b, it fixes the issue.

解决方案

The latest version of OPB SPI Core (opb_spi v1.00.c) uses a helper library "opb_ipif_v3_01_a" core. 

 

In this release, the helper library has been modified, causing the OPB SPI Core and other OPB Slave Cores that use this helper library (opb_ipif_v3_01_a) to fail in the system (including any timing issues). 

 

This issue was fixed by eliminating the reset of the posted write inhibit signal when OPB_Select negates. 

 

A patch is available for download that will fix this problem at: 

http://www.xilinx.com/txpatches/pub/applications/misc/opb_ipif_v3_01_a.zip
Download the patch to the "pcore" sub-directory (in your project directory) and compile the design.  

NOTE: This patch has the same version as the existing library in the EDK build.

AR# 22059
日期 05/19/2014
状态 Archive
Type 综合文章
的页面