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AR# 22137

LogiCORE PCI/PCI-X - What does the BYPASS constraint do that is applied to the I/O in the UCF file?


Keywords: PCI64, PCI32, source sampling bypass, ILOGIC, OLOGIC

Urgency: Standard

General Description:
In the Virtex-4 PCI and PCI-X UCF files, the following constraint is found on each I/O:


What is the purpose of this constraint?


PCI requires something called source sampling bypass, where you have to mux the input signal with the output signal based on the tri-state.

input = tristate ? input_from_pad : output_to_pad

The specification forbids you to view the pad input when you are driving the pad. There are two ways to do this. One is to design the bypass logic to use:

- next state output
- next state tri-state control
- registered input

To do this properly requires many extra flops in the design.

Alternatively, you can use the BYPASS constraint in the UCF file which turns on the "sneak path" in the I/O, implementing this behavior between the ILOGIC and the OLOGIC; eliminating the need for any user-designed bypass logic at all.

The BYPASS constraint directs the mapper to configure the I/O properly for source sampling bypass. In pre-Virtex-4 parts, enabling this feature was done when an IOB component was formed and the SelectIO type is some PCI derivative. It was done in the IOB configuration string. With Virtex-4, though, there is no IOB, but three things; ILOGIC, OLOGIC, and PAD. In order to properly configure the three of them to accomplish the same behavior, the netlist actually needs to get transformed on the fly and this attribute tells MAP that the transformation must be done.
AR# 22137
日期 09/27/2005
状态 Active
Type ??????