AR# 22207

8.1i ISE - When creating a new Verilog or VHDL source using the Project Navigator New Source Wizard, I find that there are only 12 cells available for Port Name entry


Keywords: VHDL, Verilog, new source, wizard, port names, table, pins

Urgency: Standard

General Description:
When creating a new HDL source, using the New Source Wizard, I find that here is a table entry form provided to enter all of the HDL port names. In 8.1i, there are only twelve rows available to enter port names, and there does not seem to be a way to add more.


You should be able to add as many ports as needed. However, the scroll mechanism for this table was incorrectly associated only with Bus, MSB and LSB columns. You can click any of these columns in the last row of the table to activate scrolling and then add as many ports as desired.
AR# 22207
日期 03/26/2008
状态 Archive
Type 综合文章