When running PAR on my Virtex-4 design, I receive the following messages.
"WARNING:Place:119 - Unable to find location. MULT component
"ERROR:Place:120 - There were not enough sites to place all selected components."
I have seen (Xilinx Answer 22067) and know that the message refers to DSP48 components. According to my MAP report, I am using less than 100% of the DSP48 components in my device. They cannot be placed. Why?
DSP48 components within a tile share a C input bus. This means that unless you have 50 pairs of DSP48 components that share the same C inputs, you will not be able to use 100% of the DSP48s in a device.
For more information on the shared resources in a DSP tile, please see the XtremeDSP for Virtex-4 FPGAs User Guide:
Starting in 8.1i, XST has an option to control the DSP Utilization Ratio. This will allow you to control the number of DSP48 components inferred and prevent these placement issues.