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AR# 22668

LogiCORE Fibre Channel Arbitrated Loop v1.1 Core - Setup/hold errors occur in DCM_STANDBY macro in timing simulation

描述

During timing simulation of the Fibre Channel Arbitrated Loop v1.1 core, I see a setup/hold error reported on the following component (or something similar) in the DCM_STANDBY macro that is automatically added by MAP: 

 

DCM_AUTOCALIBRATION_DCM_CORE/\DCM_CORE/lk.0.sr/SRL16E\

解决方案

This timing violation can be safely ignored.

AR# 22668
日期 05/19/2014
状态 Archive
Type 综合文章
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