AR# 2267

3.x FPGA Express - "Internal Error: Abort at 1551"


Keywords: FPGA, Express, abort, 1551, Verilog, module, black box

Urgency: Standard

General Description:
When I instantiate black boxes in Verilog, the following Synopsys error is reported:

"Internal Error 'Abort at 1551'."


If black boxes are instantiated without module declarations, this "Abort" error will be reported.

Black boxes instantiated in Verilog must have module declarations so that the synthesis tool can determine which ports are inputs/outputs/inouts.

For more information on using black boxes in FPGA Express, please see:

(Xilinx Answer 3436)
(Xilinx Answer 5388)
(Xilinx Answer 8543)
(Xilinx Answer 10419)

For more information on module declarations in Verilog, please refer to (Xilinx Answer 5008).
AR# 2267
日期 08/11/2003
状态 Archive
Type 综合文章