UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 22715

8.2 System Generator for DSP - Why does my System Generator for DSP 6.3 or 7.1 design (which passed generics to the black box for port widths) fail in System Generator for DSP 8.1?

描述

Why does my System Generator for DSP 6.3 or 7.1 design (which passed generics to the black box for port widths) fail in System Generator for DSP 8.1?

解决方案

This problem is caused by a change in the black box port API. You must now use the protected mechanism for passing generics. You can find the protected mechanism documented in the black box help.

AR# 22715
日期 05/19/2014
状态 Archive
Type 综合文章
的页面