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AR# 22773

Virtex-4 RocketIO - Digital Simulation Considerations

描述

This Answer Record describes digital simulation (Smart Model) issues that are important additions to the information listed in Chapter 7 of the Virtex-4 RocketIO User Guide:

https://www.xilinx.com/support/documentation/user_guides/ug076.pdf

解决方案

The period of the incoming RXP/RXN signal must be restricted to an even number of pico seconds.

Because of the way the Smart Model accounts for PMA operation, incoming signals with an odd period (for example, 321 ps) will result in loss of lock.

This restriction also applies to the MGT reference clock. 

This clock should be rounded to the nearest 1/10 of a nS. For example, use 4.2 nS instead of 4.17 nS.

AR# 22773
日期 08/28/2017
状态 Active
Type 综合文章
器件
  • Virtex-4
  • Virtex-4 FX
的页面