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AR# 22900

11.1 MAP - "ERROR:LIT:252" when using Synplify Pro 8.1


I have set the fanout limit for my design and am now seeing a DRC failure in MAP. Why is that? 
"ERROR:LIT:252 - Pins WEB0, WEB1, WEB2, and WEB3 of RAMB16 symbol 
data.data_0_10" (output signal=lpc_top/lpc_agen/ag_mem/out_bus0[10]) do not 
share the same signal. When WRITE_WIDTH_B is set to 1, 2, 4, or 9, these pins 
should be connected to the same signal."


This is a bug in Synplify Pro 8.1 where logic is being replicated to meet the fanout limit without regard for the connectivity restrictions in the hardware. 
This problem could be worked around by setting syn_maxfan to a higher value (200) in Synplify Pro 8.1. 
This bug has been fixed in Synplify Pro 8.4.
AR# 22900
日期 05/20/2014
状态 Archive
Type 综合文章
  • ISE Design Suite - 11.1