.vhd Line <#> = has two possible definitions in the scope"">


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AR# 22916

XST - "ERROR:HDLParsers:810 - .vhd Line <#> = has two possible definitions in the scope"


The HDL Parser in XST 8.1i fails when synthesizing the following:

With the following library declarations:

use ieee.std_logic_signed.all

use ieee.std_logic_unsigned.all


When using the following construct::

case MODE is

when "0001" =>

if ( DIN(2 downto 0)= "011" ) then

SIG_EN <= '1';


SIG_EN <= '0';

end if;


end case;

The HDL Parser reports the following error message:

"ERROR:HDLParsers:810 - "<file_name>" Line <#>. = has two possible definitions in this scope."

Synthesis succeeded in ISE 6.3.03i and 7.1.04i.


This is a valid error. The IEEE library std_logic_signed has functions that are also referenced in the std_logic_unsigned. This is why declaring these two libraries in the same scope is not allowed. It is always recommended in VHDL coding to use only one of these libraries at a time and not both.

This worked in the older versions of XST because XST was not performing this syntax check correctly.

AR# 22916
日期 12/15/2012
状态 Active
Type 综合文章