UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 23259

8.1 System Generator for DSP - When using the Viterbi with an enable pin, why do I see a difference between my System Generator for DSP 7.1 design and my System Generator for DSP 8.1 design?

描述

When using the Viterbi with an enable pin, why do I see a difference between my System Generator for DSP 7.1 design and my System Generator for DSP 8.1 design?

解决方案

This is a result of a change in behavior of the enable. It is recommended that the enable for the Viterbi not be used in System Generator for DSP 8.1 or 8.1.01. 

 

This issue is fixed in System Generator for DSP 8.2.

AR# 23259
日期 05/20/2014
状态 Archive
Type 综合文章
的页面