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AR# 2864

M1.4, 1.3 LogiBLOX, NGDBUILD/MAP - Warning/Error:basnu - logical block <x>of type <x> is unexpanded.


Keywords: LogiBLOX, MAP, unexpanded, logical block, basnu, based, 72,

Urgency: Standard

General Description:
In a design containing LogiBLOX conmponents, the following
error and warning messages may be seen during NGDBUILD:

edif2ngd: version M1.3.7
Copyright (c) 1995-1997 Xilinx, Inc. All rights reserved.
ERROR:based:72 - The EDIF netlist "<logiblox_module>.edn" was created
by the Xilinx NGD2EDIF program and is not a valid input netlist.
This netlist can only be used for simulation. Similarly, an EDIF
netlist created by LogiBLOX can only be used for simulation; the
implementation of a LogiBLOX module is either generated during
NGDBUILD (based on the module properties) or defined in the
LogiBLOX-generated NGO file (for synthesis flows).
Launcher: "edif2ngd" exited with an exit code of 1.


WARNING:basnu - logical block "<instance_name>" of type "<logiblox_module>" is
Logical Design DRC complete with 1 warning(s).

Later during the MAP stage, the following error is seen:

ERROR:basnu - logical block "<instance_name>" of type "<logiblox_module>"
is unexpanded.
Errors detected in general drc.



M1.3, M1.4 LogiBLOX:

The typical cause of this problem is having LogiBLOX create an
EDIF netlist for SIMULATION in the project directory
(usually called <module_name>.edn). This is typically done
for Foundation and Viewlogic functional simulation, as
well as for other CAE simulation platforms.

Following its precedence rules, NGDBUILD reads in the LogiBLOX EDIF
file, assumes it is an *implementation* EDIF netlist, and
attempts to expand it, overwriting any pre-existing .ngo
implementation netlist files created by LogiBLOX. It is this
occurrence that may cause an "unexpanded block" error message.


If you are not using the EDIF simulation models, delete the
current <logiblox_module>.edn and recreate the module with
LogiBLOX without also directing it to create an EDIF
simulation netlist.

If an EDIF simulation netlist is required, recreate the
LogiBLOX module specifying the EDIF netlist as an output, but
rename the <logiblox_module>.edn before implementing the
design in the Xilinx tools.

This problem and has been fixed in
the M1.5 release by changing the .NGO extension for the
LogiBLOX implementation netlist to ".NGC".

See (Xilinx Solution #3904) for additional information on
this issue.


If you see something like the following error:

"ERROR:basnu:93 - logical block "L2" of type "PREPROC_MEM_16X18" is unexpanded.
ERROR:basgb:230 - L2 LogiBLOX DRC: Incorrect connection for pin(s) SPO. These
pins must be connected."

This has been observed when the SPO output of a LogiBLOX
dual-port RAM is not connected, and LogiBLOX is directed to
generate an XNF implementation netlist for that module. A
mismatch occurs because the unconnected SPO pin does not
get a pin record created for it when the XNF netlist is created, and this causes a pin mismatch in NGDBuild which in turn
causes the module to be unexpanded.

There are several potential work-arounds:

1. Attach a dangling net to the SPO port to
force the XNF netlister to create a reference to the SPO pin
in the XNF.

2. Direct LogiBLOX to write out an EDIF
implementation netlist instead of an XNF netlist since this
is problem is limited to the XNF netlister only.

3. Use a single-port RAM if you do not need to access both READ
and WRITE ports simultaneously for your function.
AR# 2864
日期 02/08/2001
状态 Archive
Type ??????