When using the Foundation simulator or the Viewlogic simulator such as Viewsim I am not getting any output signals from the CK_DIV or OSC52 symbols, or I am getting Error 8030, or Error 8031.
The CK_DIV and OSC52 symbols cannot be simulated because thier functionallity depends on the attributes divide1_by and divide2_by. These attributes are defined by the user and therefore, no simulation models can be made.
When doing functional simulation in the Foundation Logic Simulator, if the mode is changed to TM, an arbitrary frequency is applied to the two clock outputs. These clocks are not correlated to the input clock.
For simulation purposes the best thing to do is to apply the stimulus directly to the outputs of the CK_DIV or OSC52 component.
This applies to Workview Office functional simulation as well. After 'Create Digital Netlist', upon loading the vsm file in viewsim, an error will appear: unrecognized component type CK_DIV, instance name $###. Module ignored.
It might also give license error vsec 8030, 8031.
The workaround for workview office will be to run 'Xilinx Functional Simulation' as if the design has RAM or netlist instantiation.