AR# 29168


LogiCORE Block Memory Generator - XCO parameters have changed in v2.5


For Block Memory Generator v2.5 and later, XCO parameters have changed. Consequently, if you attempt to generate a v2.5 or newer core using a v2.4 XCO file or previous versions of the file, the core generation errors out and fails.

From v2.4 to v2.5, the following XCO parameters have been changed:









In general, the option to register the output of the RAM primitives and the output of the core have been redefined to individual ports. Previously, the options applied to both ports; now you have control over individual ports.


To migrate to the Block Memory Generator v2.5 or newer Core from previous versions of the block memory generator cores using existing XCO files, use one of the following three options.

Option 1

If you have XCO files from Block Memory Generator v2.4, use the CORE Generator Upgrade feature. See the Upgrading a Core section in the "CORE Generator Help" at:

Option 2

Manually open the XCO file(s) and edit the following lines:

1. SELECT Block_Memory_Generator family Xilinx,_Inc. 2.4 (change 2.4 to 2.5 or later)

2. CSET register_output_of_memory_core=true (remove this line)

3. CSET register_output_of_memory_primitives=false (remove this line)

4. CSET register_porta_output_of_memory_core=true (add this line and set the value used for 2.)

5. CSET register_portb_output_of_memory_core=true (add this line and set the value used for 2.)

6. CSET register_porta_output_of_memory_primitives=false (add this line and set the value used for 3.)

7. CSET register_portb_output_of_memory_primitives=false (add this line and set the value used for 3.)

Option 3

Generate the new core from scratch by using the customization GUI and setting the options. This might not be the best solution if you have multiple numbers of block memory cores to regenerate.

NOTE: If you have Block Memory Generator v1.1, 2.1, 2.2, or 2.3 and want to regenerate Block Memory Generator v2.5 or later, you can manually edit the XCO file as mentioned in Option2 and also edit this line:

SELECT Block_Memory_Generator family Xilinx,_Inc. 2.1 (change 2.1 to 2.4)

Then, use the CORE Generator Upgrade feature to generate Block Memory Generator v2.5 or newer (see Option 1 above). You can also use Option 2 directly by changing the version number from 2.1 to 2.5 or newer and removing/adding the other parameters as described in Option 2.

NOTE: If you have legacy Single-Port or Dual-Port Block Memory cores and want to regenerate Block Memory Generator v2.5, use the Block Memory Migration Kit available at:

AR# 29168
日期 12/15/2012
状态 Active
Type 综合文章
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