AR# 3000: CPLD XC9500 Family - Why do the XC9500 family libraries have pull-up elements?
CPLD XC9500 Family - Why do the XC9500 family libraries have pull-up elements?
Keywords: 9500, pullups, pull-ups, XC9500
General Description: Although the XC9500/XL family devices have pull-ups, they are not user- controllable. Why are they still included as library elements?
In 3.1i, the pull-up elements have been removed from the CPLD library.
If an internal 3-state mux is drawn in a schematic (using 2 or more BUFE/BUFT buffers), direct functional simulation of the schematic will fail to produce a 1 state if all buffers are disabled (actual chip behavior), unless a pull-up symbol is connected.
Users can retarget an FPGA design containing pullup symbols to 9k without having to remove the pullups; the resulting implementation will still be accurate.