UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 3003

Synopsys FPGA Compiler: Error code "VE-0" from analyze command in dc_shell

Description

Keywords: analyze, synopsys, dc_shell
Urgency: standard
General description:
When a source design file is prepared on a PC (using a PC-based text editor) or is detached from an email message on a PC-based email system, the file contains carriage-return characters that are incompatible with the Synopsys parser. If you try to analyze the file using dc_shell on a UNIX workstation, the analyze command produces the following error, typically referencing line 1:

(File: mydesign.v Line: 1)
(VE-0)

This occurs on FPGA Compiler and Design Compiler.

解决方案

Convert the file using the dos2unix command before running the analyze command.
AR# 3003
创建日期 10/28/1997
Last Updated 04/25/2007
状态 Archive
Type 综合文章