AR# 30279

描述

The following are the latest "plbv46_pci_v1_03_a" fixes: 

- Fix for Virtex-5 to correct PCI BARs that were erroneously enabled when the parameter "C_PCIBAR_NUM" was less than 3. 

- Enhancement to increase PCI BAR length upper limit from 29 to 30 (power of 2) bytes. 

- Fix for SERR_N asserted during PCI2PLB read to allow prefetch to complete. 

- Moved to plbv46_slave_v1.01.b, not a functional difference. 

- Fix for Linux booting in ml510 where Linux/compiler optimization breaks up a configuration read 32-bit word operation into 4 separate byte read operations. The byte reads occurred quickly one after another and exposed an issue where the last byte read would be corrupt. 

- Added support for Virtex-4 Q and Virtex-4 QR.

解决方案

Please use the latest tactical patch (below) in EDK 10.1 sp3. Please see (Xilinx Answer 31638).  

http://www.xilinx.com/txpatches/pub/applications/pci/plbv46_pci_v1_03_a_090808.zip
 

Older Patch: 

http://www.xilinx.com/txpatches/pub/applications/misc/patch02122008.zip
 

Unzip and place the "plbv46_pci_v1_03_a" directory in the local "pcore" directory of your current project. 

The issue will be fixed in the plbv46_pci_v1_03_a version in EDK 11.1, available at:  

http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp

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