UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 32511

11.1 XST - Known issues

Description

Keywords: synthesis, synthesize, problems

This Answer Record contains Known Issues for XST 11.1.

解决方案

Q1. Does XST support V2K construct Config?
A1.This feature is not currently supported. Support for this is planned for future releases.

Q2. Does XST support Nested "For Loop"?
Q2. XST has difficulties synthesizing nested "For Loop". Xilinx is actively receiving test cases and fixing the issues on case-by-case basis.

Q3."FATAL_ERROR:Xst:Portability/export/Port_Main.h:127:1.13.276.1."
A3. See (Xilinx Answer 22271).

Q4. Backward Register Balancing has no effect on carry chains.
A4. See (Xilinx Answer 21766).

Q5.The Verilog "wait" statement is not supported.
A5.This is a known limitation in XST. There is no fix scheduled for this issue.

Q6. XST does not reject size mismatch in assignment.
A6. This is a known limitation in XST.

Q7. "WARNING:Xst:819 - file.vhd Line xx: The following signals are missing in the process sensitivity list..."
A7. See (Xilinx Answer 14310).

Q8. An unconstrained integer results in bad quality.
A8. This is a known limitation in XST. This issue is fixed for V6 and S6 devices only.

Q9. Declaring constants in one package and assigning them in another is not supported.
A9. This is a known limitation in XST. No fix is scheduled for this issue.

Q10. The use of multiple wait conditions is not supported.
A10. This is a known limitation in XST. No fix is scheduled for this issue.

Q11. Use of the same integer variable for two separate loops generates an incorrect netlist.
A11. See (Xilinx Answer 22066).

Q12. Does XST support Verilog-specific blocks?
A12. See (Xilinx Answer 22171).

Q13. XST does not support ifdefs in meta comments.
A13. See (Xilinx Answer 22227).

Q14. "FATAL_ERROR:Xst:Portability/export/Port_Main.h:<numbers>".
A14. See (Xilinx Answer 23210).

Q15. ERROR:Xst:1923 - Line <MY_LINE> has not enough elements for target <MY_DATA>".
A15. See (Xilinx Answer 22376).

Q16. Does XST support System Verilog?
A16. No.

Q17. What does "ERROR:Xst:772 - "Attribute is not authorized : 'succ'." mean?
A17. See (Xilinx Answer 22495).

Q18. XST runs out of memory or takes a long time to synthesize with designs having nested for loops.
A18. See (Xilinx Answer 22625).

Q19. FSM is not getting encoded by XST when there is no initial condition.
A19. See (Xilinx Answer 22761).

Q20. XST - "WARNING:HDLParsers:3530 - Time stamp of file <name_of file>.vhd is newer than the current system time."
A20. See (Xilinx Answer 23050).

Q21."ERROR:HDLParsers:3501 - Circular dependency is not supported!"
A21. See (Xilinx Answer 23141).

Q22."ERROR:NgdBuild:752 - Line xx in '<design>.ucf': Could not find instance(s) 'inst_lut100' in the design"; errors occur for designs that passed correctly in ISE 8.1i.
A22. See (Xilinx Answer 23249).

Q23."Warning "Xst:2183: the following tristate(s) are NOT replaced by logic". This is the reason why XST cannot replace TBUFs with logic.
A23. See (Xilinx Answer 20048).

Q24. XST does not allow passing strings for integers.
A24. In the older versions of XST, passing integers as strings is allowed. This is against the LRM and should not be allowed. Consequently, the behavior in XST in ISE 8.2i is correct and will be maintained in future releases.

AR# 32511
创建日期 04/20/2009
Last Updated 04/23/2009
状态 Active
Type 综合文章