AR# 34149

LogiCORE FIR Compiler - When I build a reloadable Transpose FIR structure, why do I see a difference between my behavioural and post-par simulation results when targeting a Spartan-3A DSP device?

描述

When I build a reloadable Transpose FIR structure, why do I see a difference between my behavioural and post-par simulation results when targeting a Spartan-3A DSP device?

解决方案

This issue has been fixed in the FIR Compiler v5.0

Please see (Xilinx Answer 29138) for a detailed list of LogiCORE IP FIR Compiler Release Notes and Known Issues.


AR# 34149
日期 01/18/2010
状态 Active
Type 综合文章
IP