2. 技术支持
  3. AR# 3465: Foundation Schematic Editor F1.x: How to print all black schematics (instead of grey scale).
  4. AR# 34651: Virtex-6 FPGA Connectivity Kit TRD - Block RAM Utilization

AR# 34651

Virtex-6 FPGA Connectivity Kit TRD - Block RAM Utilization

描述


The User Guide utilization section shows that the TRD uses 60 RAMB36E1 components, but I see 96 used in my map report.
Why is there such a big difference?

解决方案


The User Guide number of 60 for RAMB36E1 components includes 32 used as a Simple Dual Port (SDP) RAM in "READ_FIRST" mode. 
This was changed to use twice as many RAMB36E1s using True Dual Port in "WRITE FIRST" mode. Therefore, 32 more RAMB36E1s were added to implement this change.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
34432 Virtex-6 FPGA Connectivity Kit and Targeted Reference Design (TRD) - Release Notes and Known Issues N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
34432 Virtex-6 FPGA Connectivity Kit and Targeted Reference Design (TRD) - Release Notes and Known Issues N/A N/A
AR# 34651
日期 05/23/2014
状态 Archive
Type 已知问题
Boards & Kits