General Description: Following error/warnings occur when trying to run a design through M1.4 that uses the OMUX in the IOB and also makes use of the GND availble at the EC pin in the IOB to drive the OMUX.
ERROR:x45dr - netcheck: Signal BUF0/USClk3/lastClkEn is routed to the O pin of block sClkOut<3> on routing which is not available because the EC pin is using the Logic Zero option. Re-route the connection to the O pin without using the wire shared with the EC pin. WARNING:basrt - Error found on signal: BUF0/USClk3/lastClkEn, leaving it unrouted.
This problem is fixed in the latest M1.4 Core Tools Update available on the Xilinx Download Area: