AR# 35566

MIG Virtex-6-DDR3 - simulation does not support Burst Length OTF (on the fly)

描述

MIG simulation does not support Burst Length OTF (on the fly) for both VHDL and Verilog. 

解决方案

This is only an issue with the MIG generated traffic generator available in the example design as the user design works with Burst Length OTF.

If simulations are run with Burst Length OTF the following failure behavior will occur:

  1. For VHDL simulation, Burst Length 8 will be used by default and no errors will occur.
     
  2. For Verilog simulation, simulations will stop with a message that the current traffic generator does not support OTF Burst Mode.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
39128 MIG Virtex-6 and Spartan-6 v3.7 - Release Notes and Known Issues for ISE Design Suite 13.1 N/A N/A
AR# 35566
日期 09/03/2014
状态 Active
Type 已知问题
器件 More Less
Tools
IP