AR# 35898

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12.1 EDK, MPMC v6.00.a - "ERROR:EDK:422 - PARAMETER C_MCB_LOC has value MEMC5 which is not allowed..."

描述

How can I use the bank 5 MCB for my MPMC design? My only parameter options are:

PARAMETER C_MCB_LOC = MEMC1-MEMC4

If I manually change the MHS file toPARAMETER C_MCB_LOC = MEMC5, I receive an error:

ERROR:EDK:422 - C:\system.mhs line 102 - PARAMETER C_MCB_LOC has value MEMC5 which is not allowed, as specified by VALUES tag in MPD

If I change it toPARAMETER C_MCB_LOC = MEMC2, then I receive the following synthesis error:

Running UPDATE Tcl procedures for OPTION PLATGEN_SYSLEVEL_UPDATE_PROC...
ERROR:EDK:3193 - issued from TCL procedure "generate_spartan6_mcb_constraints"
line 154
MCB_DDR3 (mpmc) - Could not find any signals of LOCs in the file
"C:/Xilinx/12.1/ISE_DS/ISE/coregen/ip/xilinx/other/com/xilinx/ip/mig_v3_4/dat
a/fpga_tlib/spartan6/6s/xc6slx100tfgg676_pkg.xml".
ERROR:EDK:440 - platgen failed with errors!
make: *** [implementation/microblaze_0_wrapper.ngc] Error 2
Done!


How can I use the MCB in bank 5 in an EDK design that uses MPMC?

解决方案

To work around this issue, choose any other MCB location setting (MEMC1-MEMC4) toattempt to generate the design.If an error occurs, choose a different location.

After netlist generation has completed successfully, copy and paste the contents of the EDK project implementation/<mpmc_inst>_wrapper/<mpmc_inst>.ucf into the top-level UCF, which is typically named "system.ucf".

Finally, modify the recently copied constraints to reflect the correct location (LOC) constraints for the desired MCB and I/O bank.

This issue is scheduled to be fixed in MPMC v6.01.a, to be released in EDK 12.2.
AR# 35898
日期 05/19/2012
状态 Active
Type 已知问题
器件
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