We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 36749

Design Assistant for PCI Express - Simulation Questions Regarding Transaction Layer Traffic


This Answer Record identifies starting points to debug transaction layer related questions in simulation. However, much of this information is also true in hardware, but is more prevalent in simulation sincethecore generates the rootport simulation model for you.

NOTE: This Answer Record is part of the Xilinx Solution Center for PCI Express(Xilinx Answer 34536).TheXilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIeto guide you to the right information.


For information on why TLPs might not show up on the user application interface, see (Xilinx Answer 36750). This applies to both root port and endpoint applications.
For information on why TLPs might get corrupted at the MIM interface, see (Xilinx Answer 37752). This applies to both root port and endpoint applications.
Revision History
09/01/2010 - Added (Xilinx Answer 37752)
08/13/2010 - Initial Release



AR# 36749
日期 12/15/2012
状态 Active
Type 综合文章
器件 More Less