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AR# 37213

Virtex-6 FPGA Design Assistant - Troubleshoot common fabric problems

描述

This Answer Record helps guide you to solutions to common problems with the fabric resources in Virtex-6 FPGA designs.

Note: This Answer Record is part of the Xilinx Virtex-6 FPGA Solution Center (Xilinx Answer 34963).

The Xilinx Virtex-6 FPGA Solution Center is available to address all questions related to Virtex-6 devices. 

Whether you are starting a new design with Virtex-6 FPGA or troubleshooting a problem, use the Virtex-6 FPGA Solution Center to guide you to the right information.

解决方案

Select from the following list of common fabric related problems.

Each Answer Record helps guide you to a solution.


(Xilinx Answer 34120)Inversion not pushed into Output FF input
(Xilinx Answer 32987)What options are available that allow two SRL16s to be combined into one LUT Complex?
(Xilinx Answer 34164)Virtex-6 FPGA designs must be re-run through implementation in ISE 11.5 or later software

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
34963 Xilinx Virtex-6 FPGA Solution Center N/A N/A

相关答复记录

AR# 37213
日期 10/08/2019
状态 Active
Type 综合文章
器件 More Less
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