AR# 38095


ML510 - Known Issues and Release Notes Master Answer Record


This Answer Record lists all known issues with the ML510 Development Board.


(Xilinx Answer 31638)10.1 EDK SP3, plbv46_pci_v1_02_a - The latest Tactical Patch "plbv46_pci_v1_03_a" fixes issues related to Linux booting on ML510 system, Virtex-4 Q, Virtex-4 QR support and various other issues
(Xilinx Answer 32041)ML510 Board - The PLB Err led is on; Is this an issue with the board?
(Xilinx Answer 32784)12.1 EDK - Why is data not sent through my PCI card on my ML510 / ML410 system?
(Xilinx Answer 33044)11 EDK - Flashwriter is unable to successfully query target part layout using CFI on the ML510 board
(Xilinx Answer 33250)Is the 19-inch 1U Rack-Mount Chassis ready for the ML510 board?
(Xilinx Answer 33354)11.3 EDK - ML510 Timing error on NET "Ethernet_MAC/Ethernet_MAC/ phy_tx_clk_i" MAXSKEW = 5 ns
(Xilinx Answer 34614)11.4 EDK - ML510 BSB C_PPC440MC_ROW_CONFLICT_MASK and C_PPC440MC_BANK_CONFLICT_MASK are incorrect
(Xilinx Answer 34616)12.1 EDK - The "genace.tcl" file does not include the ML510 board JTAG information
(Xilinx Answer 35678)ML510 - Newer boards shipped with 1 GB DIMM
(Xilinx Answer 36219)12.1 EDK, xps_ll_temac - ML510/Lwip assumes I am using the first PHY
(Xilinx Answer 38431)ML510 - Personality Module Connectors Pinout inaccurate in UG356



Answer Number 问答标题 问题版本 已解决问题的版本
43750 Xilinx 电路板和套件解决方案中心 — 热门问题 N/A N/A


Answer Number 问答标题 问题版本 已解决问题的版本
38862 ML510 - Schematic Pin Names Incorrect N/A N/A


AR# 38095
日期 09/18/2017
状态 Active
Type 综合文章
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