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AR# 38111

MIG v3.6-v3.61 Virtex-6 DDR2/DDR3 - The Design Notes include incorrect statements regarding rank support and hardware testbench support

Description

The Design Notes for MIG v3.6-v3.61 state that"Only Single Rank memory parts are supported" and "hardware test bench logic does not support: ECC enable designs and Burst Length "On the Fly".

Dual-rank memory parts are supported so the statement "Only Single Rank memory parts are supported" should be removed. The next statement"hardware test bench logic does not support: ECC enable designs and Burst Length "On the Fly" should be modified tosay "Hardware test bench logic does not support: ECC enable designs, Burst Mode of 4 and Burst Mode of OTF."

解决方案

This is fixed in the ISE 13.1 MIG v3.7 software release.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
37173 MIG v3.6 - Release Notes and Known Issues for ISE Design Suite 12.3 N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
38951 MIG v3.61 - Release Notes and Known Issues for ISE Design Suite 12.4-14.2 N/A N/A
37173 MIG v3.6 - Release Notes and Known Issues for ISE Design Suite 12.3 N/A N/A
AR# 38111
创建日期 09/21/2010
Last Updated 05/20/2012
状态 Archive
Type 已知问题
器件
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
IP
  • MIG