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AR# 38164

LogiCORE Viterbi Decoder - How do I convert from using the IEEE802 Viterbi to the Viterbi Decoder in CORE Generator?

Description


I was using the IEEE802 Viterbi Decoder which has now been discontinued. The replacement is the LogiCORE Viterbi Decoder.
What factors must I take into consideration to move from the IEEE802 to the CORE Generator Viterbi Decoder?

解决方案

The parameters which were used with the IEEE 802 Viterbi can be used with the CORE Generator Viterbi Decoder. Those parameters are as follows:
  • Constraint length: This is set to 7 in the IEEE 802 and should be set to 7 in the CORE Generator GUI.
  • Traceback Length: This is set to 48 for non-punctured codes and 96 for punctured codes. This can be set in the CORE Generator GUI.
  • Best State: There is a best state module in the IEEE 802. This option is on by default in the CORE Generator GUI.
  • Reduced latency: There is a reduced latency option in CORE Generator GUI.
  • Soft Width: These can be set to the same width and format as the IEEE802.
Once these parmeters are set:
  1. Generate the CORE Generator Viterbi Decoder.
  2. Simulate the whole system with the CORE Generator Viterbi Decoder.
  3. Confirm issue like latency are taken into consideration.
  4. Confirm the BER performance is the same.

If there are any discrepancies or difference in BER performance, please open a WebCase:
http://www.xilinx.com/support/clearexpress/websupport.htm
For a detailed list of LogiCORE Viterbi Decoder Release Notes and Known Issues, see (Xilinx Answer 29448).

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
29448 LogiCORE Viterbi Decoder - Release Notes and Known Issues N/A N/A
AR# 38164
创建日期 11/02/2010
Last Updated 12/15/2012
状态 Active
Type 综合文章
IP
  • Viterbi Decoder