This situation can occur if the second DCM is sourced by one of the DLL outputs of the first DCM.
To resolve this issue,
1) If you are using an .xaw file in your design, remove the file and instead add the HDL equivalent.
2) Insert an FD primitive between the output of the OR2 gate and the RST pin of the cascaded DCM.
Adding a flip-flop will prevent any glitches introduced by the reset logic to propagate to the reset pin of the DCM.